1. Field of the Invention
The present invention relates to an adaptive access control method and a LAN (Local Area Network) relaying apparatus using the same.
2. Description of the Related Art
Conventionally, a flow control method is used in a LAN relaying apparatus in order to avoid congestion on a transmission line. For example, Japanese Laid Open Patent Application (JP-P2000-269997A) discloses a technique in which a flow control is carried out from a transmission side if the congestion exceeds a preset threshold on a reception side. FIG. 1 shows the system structure of a line processing section in this conventional LAN relaying apparatus.
Referring to FIG. 1, the line processing section of the LAN relaying apparatus is composed of a reception side memory circuit 71 and a transmission side memory circuit 75. A write operation of a line reception side data input signal is carried out to the reception side memory circuit 71 in response to a reception side write control signal from a reception side write control circuit 73. Also, a read operation of a system reception side data output signal is carried out to the reception side memory circuit 71 in response to a reception side read control signal of a reception side read control circuit 74.
The reception side write control circuit 73 supplies the reception side write control signal to the reception side memory circuit 71, and supplies a reception side write pointer to a reception side fixed threshold control circuit 72. The reception side read control circuit 74 supplies the reception side read control signal to the reception side memory circuit 71, and supplies a reception side read pointer to the reception side fixed threshold control circuit 72.
A fixed threshold can be previously set into the reception side fixed threshold control circuit 72 from a micro processor interface circuit 79. A difference between the reception side write pointer of the reception side write control circuit 73 and the reception side read pointer of the reception side read control circuit 74 with the preset fixed threshold are compared with each other. If the difference is equal to or greater than the threshold, the reception side fixed threshold control circuit 72 supplies a transmission side flow control request signal to a transmission side fixed threshold control circuit 76 in order to carry out a flow control to the transmission side.
A write operation of a system transmission side data input signal is carried out to the transmission side memory circuit 75 in response to a transmission side write control signal of a transmission side write control circuit 78. Also, a read operation of a transmission side data output signal is carried out to the transmission side memory circuit 75 in response to a transmission side read control signal of a transmission side read control circuit 77. The transmission side write control circuit 78 supplies a transmission side write control signal to the transmission side memory circuit 75, and supplies a transmission side write pointer to the transmission side fixed threshold control circuit 76. The transmission side read control circuit 77 supplies a transmission side read control signal to the transmission side memory circuit 75, and supplies a transmission side read pointer to the transmission side fixed threshold control circuit 76.
A fixed threshold can previously set into the transmission side fixed threshold control circuit 76 from the micro processor interface circuit 79. A difference between the transmission side write pointer of the transmission side write control circuit 78 and the transmission side read pointer of the transmission side read control circuit 77 with a preset fixed threshold are compared with each other. If the difference is equal to or greater than the threshold, the transmission side fixed threshold control circuit 76 supplies a reception side flow control request signal to the reception side fixed threshold control circuit 72, in order to carry out a flow control to the reception side. Also, the transmission side fixed threshold control circuit 76 outputs a pause frame to a line transmission side in response to a transmission side flow control request signal supplied from the reception side fixed threshold control circuit 72.
However, the above-mentioned conventional LAN relaying apparatus uses only the preset fixed thresholds. Thus, if a normal access cannot be carried out due to a clock skew between the line side and the system side or a queuing process on the system side, it is impossible to attain an adaptive operation to the normal access.
Also, the conventional LAN relaying apparatus only has an object to prevent the congestion occurring in a part of a transmission line from being spread to other normal transmission lines. Thus, the congestion avoiding control is fixed.
In conjunction with the above description, a flow control method between ATM-LAN node is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 7-283817). In this conventional example, whether the number of cells in a buffer of the node exceeds a predetermined threshold value is checked. If the number of cells exceeds the threshold value, a cell transmission prohibition cell is sent to a node on the upper stream side to carry out a flow control between the adjacent nodes. In the cell transmission prohibition state, when the number of cells in the buffer is less than the threshold value, a cell transmission prohibition cancel cell is sent to the upper stream node to permit the transmission of the cells from the upper stream node.
Also, a data communication method is disclosed in Japanese Laid Open Patent Application (JP-P-Heisei 10-70555). In this conventional example, the data communication method is used in a communication system with a switching system and port cards, each of which has a buffer or is connected to a buffer. The buffer is adaptive to be connected with or is incorporated in the switching system. The buffer has a buffer occupation percentage defined as a ratio of the number of memory locations which can be used to store input data in the buffer and a total of the memory locations in the buffer. A plurality of priority data flows inputted to and outputted from the port card are controlled. The plurality of priority data are of a plurality of data types which includes a first data type that has a first priority and a second data type that has a second priority lower than the first priority. The first data type contains a first priority bit stream and the second data type has a second priority bit stream. The transmission of all the second priority bit streams to the port card which has a buffer occupation percentage higher than a second threshold value which is higher than a first threshold value is set to a non-operation state. The transmission of the second priority bit stream to the port card is set to an operable state when the buffer occupation percentage falls below the first threshold value. The transmission of all the first priority bit streams to the port card which has a buffer occupation percentage higher than a fourth threshold value which is higher than a third threshold value which is higher than the second threshold value is set to a non-operation state. The transmission of the second priority bit stream to the port card is set to an operable state when the buffer occupation percentage falls below the first threshold value.
Also, a bi-directional routing switch for a digital signal is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 10-224376). In this conventional example, the routing switch routs a digital signal containing some digital signal cells of two types at least. The first type requests the consistence of the cell transmission but admits a variable bit rate transmission. The second type admits that some of transmitted cells are lost. The routing switch is composed of a plurality of input ports to receive input cells, and an output ports to output the output cells. A buffer circuit is connected with the input ports and the output ports and holds a plurality of cells of the respective types before the cells are outputted from the output port after being received from the input ports. The buffer has a first buffer capacity for the first type of cells and a second buffer capacity for the second type of cells. A control circuit determines whether each input cell is of the first type or of the second type. The control circuit stores the input cells of the first type in the first buffer capacity when the number of input cells reaches a predetermined value, and sets a state in which a flow control signal is selected, to block the input cells of the first type. In addition, the control circuit stores the input cells of the second type in the second buffer capacity when the number of input cells of the second type does not reach the predetermined value, and discards the input cells of the second type when the number of input cells of the second type reaches the predetermined value.
Also, a switching hub is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 10-276224). In this conventional example, the switching hub is composed of a plurality of ports, a buffer provided in common to the plurality of ports or for every port, to store transfer data temporarily, a network interface section which is connected with each of the ports to carry out a communication control, and a switching section which selectively switches the connection of the buffer and the network interface section. A plurality of threshold values are set step-by-step in accordance with a data quantity in the buffer, and a transmission stop time is set for every threshold value. A data quantity monitoring section stops the transmission for the transmission stop time each time the data quantity exceeds one of the plurality of threshold values.
Also, a flow control method is disclosed in Japanese Laid Open Patent Application (JP-P2000-36839). In this conventional example, a data communication network has a plurality of data traffic sources which are interconnected with a transmission link. In order to avoid congestion in a flow control node, the flow of the data traffic through the above flow control node from the source is controlled. The traffic which passes the above flow control node is monitored to detect a congestion state. The source of the traffic contributing to the above congestion is distinguished in response to the detection of the congestion state, and a temporary stop time is calculated for which the distinguished source stops the transmission to the flow control node. The calculated temporary stop time is varied by a random quantity, and a temporary stop command containing the varied temporary stop time is transmitted to the distinguished source.
Also, a flow control circuit is disclosed in Japanese Laid Open Patent Application (JP-P2001-203705A). In this conventional example, the flow control circuit is composed of a reception buffer which holds receive data, an empty buffer region calculating section which calculates an empty space in the reception buffer, an upper limit value holding section holding an upper limit value of the empty quantity of the reception buffer, and a minimum value holding section holding a minimum value of the empty quantity of the reception buffer. A mode switching value holding section holds a mode switching value to switch a data transmission mode from a back pressure method to a credit method. A flow control data generating section outputs a flow control data to a transmission side to carry out the data transmission in the back pressure method when the calculated empty space region is in the range between the upper limit and the low limit. The flow control data generating section outputs the flow control data to the transmission side to carry out the data transmission in the credit method when the calculated empty space region reaches the mode switching value, until the empty quantity of the reception buffer reaches the upper limit.